orderin g numbe r : ena1843 bi-cmos ic LV5857MX step-down switching regulato r overview LV5857MX is a 1ch step-down switchi ng regulator. with built-in two 0.13 power mosfet switch, it achieves high output current and high efficiency. with low-heat resistance, miniature package mf p8 (200mil) with heat-sink is adopted. since it is current mode control type, it has good load current response, and phase compensation is easy. with on/off pin, operating can be less than 60 a at stand-by mode. it has cycle-by-cycle over current protection for load devices. with external capacitor, it achieves soft start. functions ? 3a 1ch step-down ? thermal shutdown protection ? sm all package: mfp8 (2 00mil) with heat sink ? reference voltage: 0.672v ? hi gh efficiency (93% i out = 1a, v in = 12v, v o = 5v) ? fixed frequency: 340khz ? standby mode ? soft start / soft stop ? over-current protection(latch off method) specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum input v in voltage v in max 20 v boot pin maximum voltage v bt max 25 v sw pin maximum voltage v sw max v in max v boot pin-sw pin maximum voltage v bs-sw max 7 v en maximum voltage v en max 20 v fb, comp, ss pin maximum voltage v fs max 7v allowable power dissipation pd max mount on a specified board * 2.05 w junction temperature tj max 150 c operating temperature topr -20 to 80 c storage temperature tstg -40 to 150 c specified substrate : 46.0mm 32.0mm 1.6mm glass e poxy substrate. note: plan the maximum voltage while including coil and surge voltages, so that the maximum voltage is not exceeded even for an inst an t. specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 92910 sy 20100915-s00003 no.a1843-1/5
LV5857MX no.a1843-2/5 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit v in pin voltage v in 8 to 18 v boot pin voltage v bt -0.3 to 23 v sw pin voltage v sw -0.4 to v in v boot pin-sw pin voltage v bs-s w 6.5 v en voltage v en 18 v fb, comp, ss pin voltage v fso 6 v electrical characteristics at ta = 25 c, v in = 12v, unless otherwise specified. ratings parameter symbol conditions min typ max unit ic current drain at standby i cc 1 en=0v 60 a ic current drain in operation i cc 2 en=5v, fb=1v 2.5 ma efficiency effcy v in =12v , i out =1a, vo=5v, design target *2 93 % reference voltage vref v in =8v to 28v -2% 0.672 +2% v fb pin bias current iref fb=0.672v 10 100 na high-side on resistance ronh boot=5v, i out =1 a 0.13 low-side on resistance ronl 0.13 oscillation frequency f osc 340 khz en high-threshold voltage venth 1.5 v maximum on duty d max 80 % minimum on duty d min 8 % sw peak current limit icl1 v in =12v , v out =5v, l=10 h 4 a thermal shutdown temperature ttsd *design guarantee *3 160 c thermal shutdown temperature hysteresis dtsd *design gu arantee *3 40 c soft start current i ss ss=0v 6 a discharge on-resistance v sw on 35 v in uvlo lock voltage v uvlo l 6.0 v v in uvlo lock release voltage v uvlo h 6.9 v *2: reference value (not tested before shipment) *2: design guarantee (value guaranteed by design and not tested before shipment)
LV5857MX package dimensions unit : mm (typ) 3372 sanyo : mfp8(200mil) 5.0 4.4 6.0 12 8 0.15 0.35 1.27 (0.65) 1.7 max (1.5) (2.6) (3.4) 0.05 0.43 top view side view side view bottom view pin assignment 1 2 3 4 8 7 6 5 boot v in sw gnd ss en comp fb to p view block diagram and sample application circuit -20 0 20 40 60 80 100 0 2.5 2.05 1.5 1.0 0.5 2.0 pd max -- ta ambient temperature, ta -- c allowable power dissipation, pd max -- w 1.15 no.a1843-3/5 fb comp osc 340khz error amp. pwm comparator ss en uvlo + current sense amp. pre-drive vref 0.672v tsd internal regulator v in internal regulator (5v) internal stable supply v in 1:n sw boot boot (sw + vreg.) gnd v out ++ -- c3 c4=open rb current limit pre-drive l : off h : on ovp + - soft-stop en uvlo tsd uvp + - -30% +20% c1,c2,c5,c8,c9=ceramic capacitor
LV5857MX pin function pin no. pin name function equivalent circuit upper mos transistor boot strap capacitance connection pin. connect the boot capacitance of about 0.1uf between sw pins. to protect the sw pin?s absolute maximum rating , to ensure stable no.a1843-4/5 1 boot operation, and to eliminate noise , the boot capacitance serial resistance (about 15 ? ) rb proves effective. 2 v in input voltage pin. connect substantially large (10uf 1 piece or 2 parallel or more) capacitance between this pin and gnd. v in boot sw high side mos low side mos discharge power switch pin. 3 sw connect the output lc filter. connect the above capacitance be tw een this pin and boot pin. the discharge transistor for a soft-stop is connected with this terminal (typcal 35 ? ). it turns it on by either en=l, uvlo or a thermal shutdown. 4 gnd ground pin. feedback pin. 5 fb set the output voltage by means of split resistor in the section of the outp ut voltage vout-fb-gnd. vout setting is made as calculated below. v out = vre f { 1 + (r1 + r10) r3 } vref = 0.672v example: 3.3v output voltage (see, block diagram and application example) v out = 0 .672 { 1 + (22k + 3.9k) 10k } =3.353v ss vref 0.672v v in fb soft start pin. 8 ss sets the soft start time by means of the built-in 6 a sou rce voltage and external soft start capacity. the soft start capacity c6 can be set as follows: c6 = 6 a ts s vref where, tss is the soft start time and vref is the reference v oltage. example:1.7ms soft start time achieved c6 = 6 a 1.7ms 0.672v = 0.015 f phase compensation pin. 6 comp comp v in connects with the phas e compensation external capacitance and resistance of dc/dc converter close loop. enable pin. 7 en en v in 2pf converter enabled when set to the high voltage and disabled when low voltage or open state.
LV5857MX sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of september, 2010. specifications and information herein are subject to change without notice. ps no.a1843-5/5
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